Veljko Milutinovic

Surviving the Design
of an SISD Multimicroprocessor for GSO:
Lessons Learned

vm@etf.rs

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Multimicroprocessor Beam Former
for GSO Processing

 

Origin and Environment:

 

Presentation and Education:

 

References:

[Bierman77] Bierman, G. J.,
Factorization Methods for Discrete Sequential Estimation,
Academic Press, New York, New York, 1977.

[Manzingo80] Manzingo, R., Miller, T.,
Introduction to Adaptive Arrays,
John Wiley and Sons, New York, New York, 1980.

[Milutinovic85] Milutinovic, V.,
"Avenues to Explore
in GaAs Multimicroprocessor Research and Development,"
RCA Internal Report (Solicited Expert Opinion),
RCA, Moorestown, New Jersey, USA, August 1985.

[Fortes86] Fortes, J., Milutinovic, V., Dock, R., Helbig, W., Moyers, W.,
"A High-Level Systolic Architecture for GaAs,"
Proceedings of the HICSS-86, Honolulu, Hawaii, January 1986,
pp. 253–258.

[Milutinovic86] Milutinovic, V., Special Issue Guest Editor,
"GaAs Microprocessor Technology,"
IEEE Computer, Vol. 19, No. 10, October 1986.

[Kung88] Kung, S. Y.,
VLSI Array Processors,
Prentice-Hall, Englewood Cliffs, New Jersey, 1988.

[Helbig89] Helbig, W., Milutinovic, V.,
"The RCA’s DCFL E/D MESFET GaAs 32-bit Experimental RISC Machine,"
IEEE Transactions on Computers, Vol. 36, No. 2, February 1989,
pp. 263–274.

 

The Project in a Nutshell

a.

b.

c.

d.

e.

f.

g.

h.

Figure Y1: Basic Operational Structure.

Legend:

SAA1—Cells involved in root covariance update, and the first step of back substitution;

SAA2—Cells involved in root covariance update, and in both steps of back substitution;

U—Lower triangular matrix with unit diagonal elements;

D—Diagonal matrix with positive or zero diagonal elements;

b—A scalar initially set to 1;

K—Iteration count.